Total Credits: 10
Level: Level 4
Target Students: Specialist MSc and Part III undergraduate students in the School of Computer Science. Also available to Part II undergraduate students in the School of Computer Science subject to Part I performance. Also available to students from other Schools with the agreement of the module convenor. Available to JYA/Erasmus students.
|Autumn||Assessed by end of Autumn Semester|
Prerequisites: Or equivalent foundational knowledge of computer architecture
|G51CSA||Computer Systems Architecture|
Summary of Content:
This module is part of the Operating Systems and Architecture theme in the School of Computer Science.
This course deals with the design of modern computer processors. It covers the architectural concepts, their implementation and how we can evaluate their performance. We include an introduction to the underlying technology of Si chips, limitations and trends. Key architectural concepts to be covered are the memory hierarchy, cache architectures, virtual memory, pipelines, hazards, speculative execution, out-of-order, threading, multiprocessors, cache coherency, communications on and off chip, and instruction sets.
Method and Frequency of Class:
|Activity||Number Of Weeks||Number of sessions||Duration of a session|
|Computing||11 weeks||1 per week||1 hour|
|Lecture||11 weeks||2 per week||1 hour|
Method of Assessment:
|Exam 1||100||2 hour written examination|
Professor D McAuley
Education Aims: To provide and understanding of the design of modern processors, software (OS) implications, and the equip the student with the means to quantitatively evaluate design decisions.
Knowledge and Understanding:
The properties of modern processors.
Understand complex systems and perform quantitative performance analysis
Evaluate available processors and select those that are fit for purpose within a given domain
Transferable Skills. Quantitative evaluation of systems.
Offering School: Computer Science
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